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author | Richard Henderson <rth@twiddle.net> | 2011-05-04 13:34:31 -0700 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2011-05-08 16:55:24 +0000 |
commit | 85097db6956bc86e2377b63a8309cb8b24d54139 (patch) | |
tree | 5ce2b219c3d47375ae6a26b9b796da1b6914e692 /target-microblaze | |
parent | 00a152b48b0b7d9d77842511afcf59b5f25ec554 (diff) | |
download | qemu-85097db6956bc86e2377b63a8309cb8b24d54139.zip qemu-85097db6956bc86e2377b63a8309cb8b24d54139.tar.gz qemu-85097db6956bc86e2377b63a8309cb8b24d54139.tar.bz2 |
irq: Privatize CPU_INTERRUPT_NMI.
This interrupt name is used by i386, CRIS, and MicroBlaze.
Copy the name into each target.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-microblaze')
-rw-r--r-- | target-microblaze/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index 536222e..78fe14ff 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -41,6 +41,9 @@ struct CPUMBState; #define EXCP_HW_BREAK 5 #define EXCP_HW_EXCP 6 +/* MicroBlaze-specific interrupt pending bits. */ +#define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 + /* Register aliases. R0 - R15 */ #define R_SP 1 #define SR_PC 0 |