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authorAndreas Färber <afaerber@suse.de>2012-03-14 01:38:22 +0100
committerAndreas Färber <afaerber@suse.de>2012-03-14 22:20:25 +0100
commit68cee38a9c228ada5f7cac611a229f8c6d2674c6 (patch)
tree16f75570ddd7b62a710bc94455bdccd018a3b55f /target-microblaze/helper.c
parent2b3e3cfe841d213297c0fd7845952d32e8b229d2 (diff)
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target-microblaze: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPUMBState/g" target-microblaze/*.[hc] sed -i "s/#define CPUMBState/#define CPUState/" target-microblaze/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-microblaze/helper.c')
-rw-r--r--target-microblaze/helper.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c
index e1355ff..6e0e411 100644
--- a/target-microblaze/helper.c
+++ b/target-microblaze/helper.c
@@ -25,13 +25,13 @@
#if defined(CONFIG_USER_ONLY)
-void do_interrupt (CPUState *env)
+void do_interrupt (CPUMBState *env)
{
env->exception_index = -1;
env->regs[14] = env->sregs[SR_PC];
}
-int cpu_mb_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
+int cpu_mb_handle_mmu_fault(CPUMBState * env, target_ulong address, int rw,
int mmu_idx)
{
env->exception_index = 0xaa;
@@ -41,7 +41,7 @@ int cpu_mb_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
#else /* !CONFIG_USER_ONLY */
-int cpu_mb_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
+int cpu_mb_handle_mmu_fault (CPUMBState *env, target_ulong address, int rw,
int mmu_idx)
{
unsigned int hit;
@@ -107,7 +107,7 @@ int cpu_mb_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
return r;
}
-void do_interrupt(CPUState *env)
+void do_interrupt(CPUMBState *env)
{
uint32_t t;
@@ -255,7 +255,7 @@ void do_interrupt(CPUState *env)
}
}
-target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
+target_phys_addr_t cpu_get_phys_page_debug(CPUMBState * env, target_ulong addr)
{
target_ulong vaddr, paddr = 0;
struct microblaze_mmu_lookup lu;