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| author | Andreas Färber <afaerber@suse.de> | 2013-01-18 14:20:52 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-02-16 14:50:59 +0100 |
| commit | cb3fb38e91caacfcb0f86e8c587ed74ffa34fe8e (patch) | |
| tree | bdc3a36985be3c3a98065c29b1d7250b14d458ff /target-m68k | |
| parent | 9a6ee9fd35483446fe14e083fa335358c86ba595 (diff) | |
| download | qemu-cb3fb38e91caacfcb0f86e8c587ed74ffa34fe8e.zip qemu-cb3fb38e91caacfcb0f86e8c587ed74ffa34fe8e.tar.gz qemu-cb3fb38e91caacfcb0f86e8c587ed74ffa34fe8e.tar.bz2 | |
target-m68k: Pass M68kCPU to m68k_set_irq_level()
Simplifies use of cpu_reset_interrupt() et al.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-m68k')
| -rw-r--r-- | target-m68k/cpu.h | 2 | ||||
| -rw-r--r-- | target-m68k/helper.c | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index ed9be80..2672eae 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -169,7 +169,7 @@ enum { #define MACSR_V 0x002 #define MACSR_EV 0x001 -void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector); +void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector); void m68k_set_macsr(CPUM68KState *env, uint32_t val); void m68k_switch_sp(CPUM68KState *env); diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 7d3fd94..1bae3ab 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -310,8 +310,10 @@ int cpu_m68k_handle_mmu_fault (CPUM68KState *env, target_ulong address, int rw, be handled by the interrupt controller. Real hardware only requests the vector when the interrupt is acknowledged by the CPU. For simplicitly we calculate it when the interrupt is signalled. */ -void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector) +void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector) { + CPUM68KState *env = &cpu->env; + env->pending_level = level; env->pending_vector = vector; if (level) |