aboutsummaryrefslogtreecommitdiff
path: root/target-i386
diff options
context:
space:
mode:
authorEmilio G. Cota <cota@braap.org>2016-06-27 15:01:59 -0400
committerRichard Henderson <rth@twiddle.net>2016-10-26 08:29:01 -0700
commit60e573462fcdb83aa1a41e66a9f31dc8a4364399 (patch)
treebcf0ca2191b5125f24a415597637a34666bb73fd /target-i386
parenta7cee522f3529c2fc85379237b391ea98823271e (diff)
downloadqemu-60e573462fcdb83aa1a41e66a9f31dc8a4364399.zip
qemu-60e573462fcdb83aa1a41e66a9f31dc8a4364399.tar.gz
qemu-60e573462fcdb83aa1a41e66a9f31dc8a4364399.tar.bz2
target-i386: emulate LOCK'ed INC using atomic helper
[rth: Merge gen_inc_locked back into gen_inc to share cc update.] Signed-off-by: Emilio G. Cota <cota@braap.org> Message-Id: <1467054136-10430-14-git-send-email-cota@braap.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-i386')
-rw-r--r--target-i386/translate.c24
1 files changed, 13 insertions, 11 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c
index b9f58f8..2f39dac 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -1361,21 +1361,23 @@ static void gen_op(DisasContext *s1, int op, TCGMemOp ot, int d)
/* if d == OR_TMP0, it means memory operand (address in A0) */
static void gen_inc(DisasContext *s1, TCGMemOp ot, int d, int c)
{
- if (d != OR_TMP0) {
- gen_op_mov_v_reg(ot, cpu_T0, d);
+ if (s1->prefix & PREFIX_LOCK) {
+ tcg_gen_movi_tl(cpu_T0, c > 0 ? 1 : -1);
+ tcg_gen_atomic_add_fetch_tl(cpu_T0, cpu_A0, cpu_T0,
+ s1->mem_index, ot | MO_LE);
} else {
- gen_op_ld_v(s1, ot, cpu_T0, cpu_A0);
+ if (d != OR_TMP0) {
+ gen_op_mov_v_reg(ot, cpu_T0, d);
+ } else {
+ gen_op_ld_v(s1, ot, cpu_T0, cpu_A0);
+ }
+ tcg_gen_addi_tl(cpu_T0, cpu_T0, (c > 0 ? 1 : -1));
+ gen_op_st_rm_T0_A0(s1, ot, d);
}
+
gen_compute_eflags_c(s1, cpu_cc_src);
- if (c > 0) {
- tcg_gen_addi_tl(cpu_T0, cpu_T0, 1);
- set_cc_op(s1, CC_OP_INCB + ot);
- } else {
- tcg_gen_addi_tl(cpu_T0, cpu_T0, -1);
- set_cc_op(s1, CC_OP_DECB + ot);
- }
- gen_op_st_rm_T0_A0(s1, ot, d);
tcg_gen_mov_tl(cpu_cc_dst, cpu_T0);
+ set_cc_op(s1, (c > 0 ? CC_OP_INCB : CC_OP_DECB) + ot);
}
static void gen_shift_flags(DisasContext *s, TCGMemOp ot, TCGv result,