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| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-06 12:08:46 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-06-06 12:08:46 +0000 |
| commit | 262ffdae6fdad3f6dab855a090543f5faa77ec96 (patch) | |
| tree | e827fe1a3d87399c41c23ee707fde12323ad8dea /target-i386 | |
| parent | 7e15e60388b38e12cf20ca0925bfff29bd61df1c (diff) | |
| download | qemu-262ffdae6fdad3f6dab855a090543f5faa77ec96.zip qemu-262ffdae6fdad3f6dab855a090543f5faa77ec96.tar.gz qemu-262ffdae6fdad3f6dab855a090543f5faa77ec96.tar.bz2 | |
Fix i386 segment descriptor types on reset (Avi Kivity)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4686 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386')
| -rw-r--r-- | target-i386/helper.c | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/target-i386/helper.c b/target-i386/helper.c index d3bfb9a..856d896 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -383,16 +383,22 @@ void cpu_reset(CPUX86State *env) env->idt.limit = 0xffff; env->gdt.limit = 0xffff; env->ldt.limit = 0xffff; - env->ldt.flags = DESC_P_MASK; + env->ldt.flags = DESC_P_MASK | (2 << DESC_TYPE_SHIFT); env->tr.limit = 0xffff; - env->tr.flags = DESC_P_MASK; - - cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff, 0); - cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffff, 0); - cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffff, 0); - cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff, 0); - cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffff, 0); - cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, 0); + env->tr.flags = DESC_P_MASK | (11 < DESC_TYPE_SHIFT); + + cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff, + DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | DESC_R_MASK); + cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffff, + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffff, + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff, + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffff, + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); + cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, + DESC_P_MASK | DESC_S_MASK | DESC_W_MASK); env->eip = 0xfff0; env->regs[R_EDX] = env->cpuid_version; |