aboutsummaryrefslogtreecommitdiff
path: root/target-i386
diff options
context:
space:
mode:
authorRichard Henderson <rth@twiddle.net>2013-11-02 09:35:30 -1000
committerRichard Henderson <rth@twiddle.net>2014-01-07 11:36:31 -0800
commit24b9c00fc3106a98adc0e89915584eadb092b745 (patch)
tree9fa2ea2a7278a9f491fc5282d31d50430a836579 /target-i386
parent3655a19fdd9891c1e3a568d77483a11b2ad70951 (diff)
downloadqemu-24b9c00fc3106a98adc0e89915584eadb092b745.zip
qemu-24b9c00fc3106a98adc0e89915584eadb092b745.tar.gz
qemu-24b9c00fc3106a98adc0e89915584eadb092b745.tar.bz2
target-i386: Tidy gen_op_mov_TN_reg+tcg_gen_trunc_tl_i32
For the 16 and 32-bit cases, we don't need to truncate via a temporary register. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-i386')
-rw-r--r--target-i386/translate.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/target-i386/translate.c b/target-i386/translate.c
index c07062c..3d03d47 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -1259,8 +1259,7 @@ static inline void gen_ins(DisasContext *s, int ot)
case of page fault. */
gen_op_movl_T0_0();
gen_op_st_v(s, ot, cpu_T[0], cpu_A0);
- gen_op_mov_TN_reg(MO_16, 1, R_EDX);
- tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[1]);
+ tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_regs[R_EDX]);
tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff);
gen_helper_in_func(ot, cpu_T[0], cpu_tmp2_i32);
gen_op_st_v(s, ot, cpu_T[0], cpu_A0);
@@ -1277,8 +1276,7 @@ static inline void gen_outs(DisasContext *s, int ot)
gen_string_movl_A0_ESI(s);
gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);
- gen_op_mov_TN_reg(MO_16, 1, R_EDX);
- tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[1]);
+ tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_regs[R_EDX]);
tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff);
tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_T[0]);
gen_helper_out_func(ot, cpu_tmp2_i32, cpu_tmp3_i32);
@@ -3839,8 +3837,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
ot = MO_64;
}
- gen_op_mov_TN_reg(MO_32, 0, reg);
- tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
+ tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_regs[reg]);
gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
gen_helper_crc32(cpu_T[0], cpu_tmp2_i32,
cpu_T[0], tcg_const_i32(8 << ot));