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| author | Kevin Wolf <mail@kevin-wolf.de> | 2009-10-02 22:28:57 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2009-10-04 23:10:22 +0200 |
| commit | 09d85fb8432e816eb6f9a0512f04bf8e8a218d2f (patch) | |
| tree | 55015404e940c80a22d0f67cc221f59bf53821de /target-i386 | |
| parent | 94f4af02a1705974fceb90b47e884f44184b1f22 (diff) | |
| download | qemu-09d85fb8432e816eb6f9a0512f04bf8e8a218d2f.zip qemu-09d85fb8432e816eb6f9a0512f04bf8e8a218d2f.tar.gz qemu-09d85fb8432e816eb6f9a0512f04bf8e8a218d2f.tar.bz2 | |
target-i386: Fix exceptions for fxsave/fxrstor
This patch corrects the following aspects of exception generation in
fxsave/fxrstor:
* Generate #GP if the operand is not aligned to a 16 byte boundary
* Generate #UD if the LOCK prefix is used
* For CR0.EM = 1 #NM is generated, not #UD
Signed-off-by: Kevin Wolf <mail@kevin-wolf.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-i386')
| -rw-r--r-- | target-i386/op_helper.c | 10 | ||||
| -rw-r--r-- | target-i386/translate.c | 8 |
2 files changed, 14 insertions, 4 deletions
diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c index ef0acfc..26fe612 100644 --- a/target-i386/op_helper.c +++ b/target-i386/op_helper.c @@ -4350,6 +4350,11 @@ void helper_fxsave(target_ulong ptr, int data64) CPU86_LDouble tmp; target_ulong addr; + /* The operand must be 16 byte aligned */ + if (ptr & 0xf) { + raise_exception(EXCP0D_GPF); + } + fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; fptag = 0; for(i = 0; i < 8; i++) { @@ -4406,6 +4411,11 @@ void helper_fxrstor(target_ulong ptr, int data64) CPU86_LDouble tmp; target_ulong addr; + /* The operand must be 16 byte aligned */ + if (ptr & 0xf) { + raise_exception(EXCP0D_GPF); + } + env->fpuc = lduw(ptr); fpus = lduw(ptr + 2); fptag = lduw(ptr + 4); diff --git a/target-i386/translate.c b/target-i386/translate.c index 82ee3d5..e3cb49f 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -7502,9 +7502,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) switch(op) { case 0: /* fxsave */ if (mod == 3 || !(s->cpuid_features & CPUID_FXSR) || - (s->flags & HF_EM_MASK)) + (s->prefix & PREFIX_LOCK)) goto illegal_op; - if (s->flags & HF_TS_MASK) { + if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) { gen_exception(s, EXCP07_PREX, pc_start - s->cs_base); break; } @@ -7516,9 +7516,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) break; case 1: /* fxrstor */ if (mod == 3 || !(s->cpuid_features & CPUID_FXSR) || - (s->flags & HF_EM_MASK)) + (s->prefix & PREFIX_LOCK)) goto illegal_op; - if (s->flags & HF_TS_MASK) { + if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) { gen_exception(s, EXCP07_PREX, pc_start - s->cs_base); break; } |