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| author | Paolo Bonzini <pbonzini@redhat.com> | 2014-05-27 13:58:46 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2014-06-05 16:10:34 +0200 |
| commit | e2a32ebbfe899a32a6b063f0f9e7c2593267ea88 (patch) | |
| tree | b9ce2acd0097e67bf9d56b3202d72ce4cda0916b /target-i386/helper.c | |
| parent | e7e898a76aa00e2238b119ed2910442b1c3cacdd (diff) | |
| download | qemu-e2a32ebbfe899a32a6b063f0f9e7c2593267ea88.zip qemu-e2a32ebbfe899a32a6b063f0f9e7c2593267ea88.tar.gz qemu-e2a32ebbfe899a32a6b063f0f9e7c2593267ea88.tar.bz2 | |
target-i386: unify reserved bits and NX bit check
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target-i386/helper.c')
| -rw-r--r-- | target-i386/helper.c | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/target-i386/helper.c b/target-i386/helper.c index 153a91b..a2e8bd1 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -549,6 +549,10 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, goto do_mapping; } + if (!(env->efer & MSR_EFER_NXE)) { + rsvd_mask |= PG_NX_MASK; + } + if (env->cr[4] & CR4_PAE_MASK) { uint64_t pde, pdpe; target_ulong pdpe_addr; @@ -575,9 +579,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, if (pml4e & (rsvd_mask | PG_PSE_MASK)) { goto do_fault_rsvd; } - if (!(env->efer & MSR_EFER_NXE) && (pml4e & PG_NX_MASK)) { - goto do_fault_rsvd; - } if (!(pml4e & PG_ACCESSED_MASK)) { pml4e |= PG_ACCESSED_MASK; stl_phys_notdirty(cs->as, pml4e_addr, pml4e); @@ -592,9 +593,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, if (pdpe & rsvd_mask) { goto do_fault_rsvd; } - if (!(env->efer & MSR_EFER_NXE) && (pdpe & PG_NX_MASK)) { - goto do_fault_rsvd; - } ptep &= pdpe ^ PG_NX_MASK; if (!(pdpe & PG_ACCESSED_MASK)) { pdpe |= PG_ACCESSED_MASK; @@ -633,9 +631,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, if (pde & rsvd_mask) { goto do_fault_rsvd; } - if (!(env->efer & MSR_EFER_NXE) && (pde & PG_NX_MASK)) { - goto do_fault_rsvd; - } ptep &= pde ^ PG_NX_MASK; if (pde & PG_PSE_MASK) { /* 2 MB page */ @@ -658,9 +653,6 @@ int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, if (pte & rsvd_mask) { goto do_fault_rsvd; } - if (!(env->efer & MSR_EFER_NXE) && (pte & PG_NX_MASK)) { - goto do_fault_rsvd; - } /* combine pde and pte nx, user and rw protections */ ptep &= pte ^ PG_NX_MASK; page_size = 4096; |