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| author | Paolo Bonzini <pbonzini@redhat.com> | 2014-04-29 13:10:05 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2014-05-13 13:12:40 +0200 |
| commit | 05e7e819d7d159a75a46354aead95e1199b8f168 (patch) | |
| tree | 21d3a16f818fc2b43c7333d870eff76fde1a8a07 /target-i386/cpu.h | |
| parent | e0723c451028102d9165e21424b4833376ce9666 (diff) | |
| download | qemu-05e7e819d7d159a75a46354aead95e1199b8f168.zip qemu-05e7e819d7d159a75a46354aead95e1199b8f168.tar.gz qemu-05e7e819d7d159a75a46354aead95e1199b8f168.tar.bz2 | |
target-i386: fix set of registers zeroed on reset
BND0-3, BNDCFGU, BNDCFGS, BNDSTATUS were not zeroed on reset, but they
should be (Intel Instruction Set Extensions Programming Reference
319433-015, pages 9-4 and 9-6). Same for YMM.
XCR0 should be reset to 1.
TSC and TSC_RESET were zeroed already by the memset, remove the explicit
assignments.
Cc: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target-i386/cpu.h')
| -rw-r--r-- | target-i386/cpu.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index cae3a1e..827b33e 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -797,6 +797,10 @@ typedef struct CPUX86State { target_ulong cr[5]; /* NOTE: cr1 is unused */ int32_t a20_mask; + BNDReg bnd_regs[4]; + BNDCSReg bndcs_regs; + uint64_t msr_bndcfgs; + /* FPU state */ unsigned int fpstt; /* top of stack index */ uint16_t fpus; @@ -819,6 +823,8 @@ typedef struct CPUX86State { XMMReg xmm_t0; MMXReg mmx_t0; + XMMReg ymmh_regs[CPU_NB_REGS]; + /* sysenter registers */ uint32_t sysenter_cs; target_ulong sysenter_esp; @@ -928,12 +934,7 @@ typedef struct CPUX86State { uint16_t fpus_vmstate; uint16_t fptag_vmstate; uint16_t fpregs_format_vmstate; - uint64_t xstate_bv; - XMMReg ymmh_regs[CPU_NB_REGS]; - BNDReg bnd_regs[4]; - BNDCSReg bndcs_regs; - uint64_t msr_bndcfgs; uint64_t xcr0; |