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| author | Blue Swirl <blauwirbel@gmail.com> | 2010-06-19 10:42:31 +0300 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2010-06-19 10:42:31 +0300 |
| commit | 4a942ceac7e38c259116960e45ba9619611d1df9 (patch) | |
| tree | ec382b627110dc208da9e179cebe323f529e3d1c /target-i386/cpu.h | |
| parent | cf6d64bfd9ae93d14502f057d8a0917162004dc7 (diff) | |
| download | qemu-4a942ceac7e38c259116960e45ba9619611d1df9.zip qemu-4a942ceac7e38c259116960e45ba9619611d1df9.tar.gz qemu-4a942ceac7e38c259116960e45ba9619611d1df9.tar.bz2 | |
apic: avoid passing CPUState from CPU code
Pass only APICState when accessing APIC from CPU code.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-i386/cpu.h')
| -rw-r--r-- | target-i386/cpu.h | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 548ab80..0b19fe3 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -860,11 +860,12 @@ void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3); void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4); /* hw/apic.c */ -void cpu_set_apic_base(CPUX86State *env, uint64_t val); -uint64_t cpu_get_apic_base(CPUX86State *env); -void cpu_set_apic_tpr(CPUX86State *env, uint8_t val); +typedef struct APICState APICState; +void cpu_set_apic_base(APICState *s, uint64_t val); +uint64_t cpu_get_apic_base(APICState *s); +void cpu_set_apic_tpr(APICState *s, uint8_t val); #ifndef NO_CPU_IO_DEFS -uint8_t cpu_get_apic_tpr(CPUX86State *env); +uint8_t cpu_get_apic_tpr(APICState *s); #endif /* hw/pc.c */ @@ -942,8 +943,8 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, (env->eflags & (IOPL_MASK | TF_MASK | RF_MASK | VM_MASK)); } -void apic_init_reset(CPUState *env); -void apic_sipi(CPUState *env); +void apic_init_reset(APICState *s); +void apic_sipi(APICState *s); void do_cpu_init(CPUState *env); void do_cpu_sipi(CPUState *env); #endif /* CPU_I386_H */ |