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authoredgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-03 06:54:52 +0000
committeredgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-03 06:54:52 +0000
commitc7d0569543b349608f3be9c58cb0882ea6402a21 (patch)
tree094ed7f0b482771ac3f931e2c5e8b797700cc1db /target-cris
parent63c1d9252a92737ceb14566b92e0dd209dd77a94 (diff)
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CRIS: Do post-increment without going via T0.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4304 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-cris')
-rw-r--r--target-cris/translate.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 43c861d..7fdedbf 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -958,13 +958,10 @@ static unsigned int memsize_zz(DisasContext *dc)
}
}
-static void do_postinc (DisasContext *dc, int size)
+static inline void do_postinc (DisasContext *dc, int size)
{
- if (!dc->postinc)
- return;
- t_gen_mov_TN_reg(cpu_T[0], dc->op1);
- tcg_gen_addi_tl(cpu_T[0], cpu_T[0], size);
- t_gen_mov_reg_TN(dc->op1, cpu_T[0]);
+ if (dc->postinc)
+ tcg_gen_addi_tl(cpu_R[dc->op1], cpu_R[dc->op1], size);
}