diff options
| author | Paolo Bonzini <pbonzini@redhat.com> | 2016-03-04 11:30:19 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-03-04 11:30:19 +0000 |
| commit | c3ae85fc8f36b64fb73038214e4359f1e470d169 (patch) | |
| tree | b9b06861abb5e74839813b558fb6649eacbc6fa5 /target-arm | |
| parent | 9c5a7460389e92d230362a983b5a4158d6a1cefe (diff) | |
| download | qemu-c3ae85fc8f36b64fb73038214e4359f1e470d169.zip qemu-c3ae85fc8f36b64fb73038214e4359f1e470d169.tar.gz qemu-c3ae85fc8f36b64fb73038214e4359f1e470d169.tar.bz2 | |
linux-user: arm: handle CPSR.E correctly in strex emulation
Now that CPSR.E is set correctly, prepare for when setend will be able
to change it; bswap data in and out of strex manually by comparing
SCTLR.B, CPSR.E and TARGET_WORDS_BIGENDIAN (we do not have the luxury
of using TCGMemOps).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[ PC changes:
* Moved SCTLR/CPSR logic to arm_cpu_data_is_big_endian
]
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/cpu.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index ab0ea92..cbf171c 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -2102,6 +2102,17 @@ static inline int fp_exception_el(CPUARMState *env) return 0; } +#ifdef CONFIG_USER_ONLY +static inline bool arm_cpu_bswap_data(CPUARMState *env) +{ + return +#ifdef TARGET_WORDS_BIGENDIAN + 1 ^ +#endif + arm_cpu_data_is_big_endian(env); +} +#endif + static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, target_ulong *cs_base, int *flags) { |