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| author | Andreas Färber <afaerber@suse.de> | 2012-12-17 06:18:02 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-01-15 04:09:13 +0100 |
| commit | 55e5c2850293547203874098f7cec148ffd12dfa (patch) | |
| tree | f9a9cc316999b7b52726b5186a925022b3747daa /target-arm | |
| parent | 1b1ed8dc40635d60dd95c04658989af63542fcbf (diff) | |
| download | qemu-55e5c2850293547203874098f7cec148ffd12dfa.zip qemu-55e5c2850293547203874098f7cec148ffd12dfa.tar.gz qemu-55e5c2850293547203874098f7cec148ffd12dfa.tar.bz2 | |
cpu: Move cpu_index field to CPUState
Note that target-alpha accesses this field from TCG, now using a
negative offset. Therefore the field is placed last in CPUState.
Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change.
Move common parts of mips cpu_state_reset() to mips_cpu_reset().
Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
[AF: Rebased onto ppc CPU subclasses and openpic changes]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/cpu.c | 2 | ||||
| -rw-r--r-- | target-arm/helper.c | 3 |
2 files changed, 3 insertions, 2 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 94536bb..07588a1 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -64,7 +64,7 @@ static void arm_cpu_reset(CPUState *s) CPUARMState *env = &cpu->env; if (qemu_loglevel_mask(CPU_LOG_RESET)) { - qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); + qemu_log("CPU Reset (CPU %d)\n", s->cpu_index); log_cpu_state(env, 0); } diff --git a/target-arm/helper.c b/target-arm/helper.c index 66ab78e..37c34a1 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -902,7 +902,8 @@ static const ARMCPRegInfo strongarm_cp_reginfo[] = { static int mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t *value) { - uint32_t mpidr = env->cpu_index; + CPUState *cs = CPU(arm_env_get_cpu(env)); + uint32_t mpidr = cs->cpu_index; /* We don't support setting cluster ID ([8..11]) * so these bits always RAZ. */ |