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| author | Peter Maydell <peter.maydell@linaro.org> | 2011-01-06 19:37:54 +0000 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-06 22:16:59 +0100 |
| commit | b12c390b9108d44cb0b05900d6c11a73ee0e9cae (patch) | |
| tree | 75d791dbe97341c083b9cc74382659cf94982e6e /target-arm | |
| parent | 37d18660bbb1d60b4e59bf407b4b301749e0c3b9 (diff) | |
| download | qemu-b12c390b9108d44cb0b05900d6c11a73ee0e9cae.zip qemu-b12c390b9108d44cb0b05900d6c11a73ee0e9cae.tar.gz qemu-b12c390b9108d44cb0b05900d6c11a73ee0e9cae.tar.bz2 | |
target-arm: Set softfloat cumulative exc flags from correct FPSCR bits
When handling a write to the ARM FPSCR, set the softfloat cumulative
exception flags from the cumulative flags in the FPSCR, not the
exception-enable bits. Also don't apply a mask: vfp_exceptbits_to_host
will only look at the correct bits anyway.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 50c1017..05684a2 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2315,7 +2315,7 @@ void HELPER(vfp_set_fpscr)(CPUState *env, uint32_t val) if (changed & (1 << 25)) set_default_nan_mode((val & (1 << 25)) != 0, &env->vfp.fp_status); - i = vfp_exceptbits_to_host((val >> 8) & 0x1f); + i = vfp_exceptbits_to_host(val); set_float_exception_flags(i, &env->vfp.fp_status); } |