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| author | Peter Maydell <peter.maydell@linaro.org> | 2011-01-14 20:39:19 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-14 20:39:19 +0100 |
| commit | 5df8bac1d3ea43b7f55ffab07cbc6d81a37d82ab (patch) | |
| tree | 1fe999868e2dabbb94843d22350903cb86a370b5 /target-arm | |
| parent | a170576856fedfcdd7d8602cb5650a33d13d38f5 (diff) | |
| download | qemu-5df8bac1d3ea43b7f55ffab07cbc6d81a37d82ab.zip qemu-5df8bac1d3ea43b7f55ffab07cbc6d81a37d82ab.tar.gz qemu-5df8bac1d3ea43b7f55ffab07cbc6d81a37d82ab.tar.bz2 | |
target-arm: Translate with VFP-enabled from TB flags, not CPUState
When translating code, whether the VFP unit is enabled for this TB
is stored in a bit in the TB flags. Use this rather than incorrectly
reading the FPEXC from the CPUState passed to translation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/translate.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index ee19d76..f8e3616 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -59,6 +59,7 @@ typedef struct DisasContext { #if !defined(CONFIG_USER_ONLY) int user; #endif + int vfp_enabled; } DisasContext; #if defined(CONFIG_USER_ONLY) @@ -2603,12 +2604,6 @@ static void gen_vfp_msr(TCGv tmp) dead_tmp(tmp); } -static inline int -vfp_enabled(CPUState * env) -{ - return ((env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)) != 0); -} - static void gen_neon_dup_u8(TCGv var, int shift) { TCGv tmp = new_tmp(); @@ -2653,7 +2648,7 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) if (!arm_feature(env, ARM_FEATURE_VFP)) return 1; - if (!vfp_enabled(env)) { + if (!s->vfp_enabled) { /* VFP disabled. Only allow fmxr/fmrx to/from some control regs. */ if ((insn & 0x0fe00fff) != 0x0ee00a10) return 1; @@ -3804,7 +3799,7 @@ static int disas_neon_ls_insn(CPUState * env, DisasContext *s, uint32_t insn) TCGv tmp2; TCGv_i64 tmp64; - if (!vfp_enabled(env)) + if (!s->vfp_enabled) return 1; VFP_DREG_D(rd, insn); rn = (insn >> 16) & 0xf; @@ -4199,7 +4194,7 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) TCGv tmp, tmp2, tmp3, tmp4, tmp5; TCGv_i64 tmp64; - if (!vfp_enabled(env)) + if (!s->vfp_enabled) return 1; q = (insn & (1 << 6)) != 0; u = (insn >> 24) & 1; @@ -9108,6 +9103,7 @@ static inline void gen_intermediate_code_internal(CPUState *env, dc->user = (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_USR; } #endif + dc->vfp_enabled = ARM_TBFLAG_VFPEN(tb->flags); cpu_F0s = tcg_temp_new_i32(); cpu_F1s = tcg_temp_new_i32(); cpu_F0d = tcg_temp_new_i64(); |