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| author | Alvise Rigo <a.rigo@virtualopensystems.com> | 2016-01-15 11:37:42 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-01-15 14:10:02 +0000 |
| commit | deb2db996cbb9470b39ae1e383791ef34c4eb3c2 (patch) | |
| tree | 8c75e3ce109e35f0aa9e41f6e4f5fa0b278c42d4 /target-arm/op_helper.c | |
| parent | f02ccf53693758b65843264e077f90cf295e7d98 (diff) | |
| download | qemu-deb2db996cbb9470b39ae1e383791ef34c4eb3c2.zip qemu-deb2db996cbb9470b39ae1e383791ef34c4eb3c2.tar.gz qemu-deb2db996cbb9470b39ae1e383791ef34c4eb3c2.tar.bz2 | |
target-arm: Use the right MMU index in arm_regime_using_lpae_format
arm_regime_using_lpae_format checks whether the LPAE extension is used
for stage 1 translation regimes. MMU indexes not exclusively of a stage 1
regime won't work with this method.
In case of ARMMMUIdx_S12NSE0 or ARMMMUIdx_S12NSE1, offset these values
by ARMMMUIdx_S1NSE0 to get the right index indicating a stage 1
translation regime.
Rename also the function to arm_s1_regime_using_lpae_format and update
the comments to reflect the change.
Signed-off-by: Alvise Rigo <a.rigo@virtualopensystems.com>
Message-id: 1452854262-19550-1-git-send-email-a.rigo@virtualopensystems.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/op_helper.c')
| -rw-r--r-- | target-arm/op_helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index e42d287..951fc5a 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -149,7 +149,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write, /* the DFSR for an alignment fault depends on whether we're using * the LPAE long descriptor format, or the short descriptor format */ - if (arm_regime_using_lpae_format(env, cpu_mmu_index(env, false))) { + if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) { env->exception.fsr = 0x21; } else { env->exception.fsr = 0x1; |