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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-12-08 23:40:14 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2004-12-08 23:40:14 +0000 |
commit | 1e8d4eec4859574e7773fa3243fcc61fe7b534e7 (patch) | |
tree | cab3e85962e3317946dd53a11c91639dc6dd4eeb /target-arm/op.c | |
parent | 88920f344d5352dc0bb57539c4639344e9e0e0fe (diff) | |
download | qemu-1e8d4eec4859574e7773fa3243fcc61fe7b534e7.zip qemu-1e8d4eec4859574e7773fa3243fcc61fe7b534e7.tar.gz qemu-1e8d4eec4859574e7773fa3243fcc61fe7b534e7.tar.bz2 |
more complete ARM shift fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1168 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/op.c')
-rw-r--r-- | target-arm/op.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/target-arm/op.c b/target-arm/op.c index 7545bb0..6596de7 100644 --- a/target-arm/op.c +++ b/target-arm/op.c @@ -463,6 +463,7 @@ void OPPROTO op_swpl_T0_T1(void) /* shifts */ /* T1 based */ + void OPPROTO op_shll_T1_im(void) { T1 = T1 << PARAM1; @@ -473,11 +474,21 @@ void OPPROTO op_shrl_T1_im(void) T1 = (uint32_t)T1 >> PARAM1; } +void OPPROTO op_shrl_T1_0(void) +{ + T1 = 0; +} + void OPPROTO op_sarl_T1_im(void) { T1 = (int32_t)T1 >> PARAM1; } +void OPPROTO op_sarl_T1_0(void) +{ + T1 = (int32_t)T1 >> 31; +} + void OPPROTO op_rorl_T1_im(void) { int shift; @@ -503,12 +514,24 @@ void OPPROTO op_shrl_T1_im_cc(void) T1 = (uint32_t)T1 >> PARAM1; } +void OPPROTO op_shrl_T1_0_cc(void) +{ + env->CF = (T1 >> 31) & 1; + T1 = 0; +} + void OPPROTO op_sarl_T1_im_cc(void) { env->CF = (T1 >> (PARAM1 - 1)) & 1; T1 = (int32_t)T1 >> PARAM1; } +void OPPROTO op_sarl_T1_0_cc(void) +{ + env->CF = (T1 >> 31) & 1; + T1 = (int32_t)T1 >> 31; +} + void OPPROTO op_rorl_T1_im_cc(void) { int shift; @@ -536,11 +559,21 @@ void OPPROTO op_shrl_T2_im(void) T2 = (uint32_t)T2 >> PARAM1; } +void OPPROTO op_shrl_T2_0(void) +{ + T2 = 0; +} + void OPPROTO op_sarl_T2_im(void) { T2 = (int32_t)T2 >> PARAM1; } +void OPPROTO op_sarl_T2_0(void) +{ + T2 = (int32_t)T2 >> 31; +} + void OPPROTO op_rorl_T2_im(void) { int shift; @@ -548,6 +581,11 @@ void OPPROTO op_rorl_T2_im(void) T2 = ((uint32_t)T2 >> shift) | (T2 << (32 - shift)); } +void OPPROTO op_rrxl_T2(void) +{ + T2 = ((uint32_t)T2 >> 1) | ((uint32_t)env->CF << 31); +} + /* T1 based, use T0 as shift count */ void OPPROTO op_shll_T1_T0(void) |