aboutsummaryrefslogtreecommitdiff
path: root/target-arm/kvm.c
diff options
context:
space:
mode:
authorMian M. Hamayun <m.hamayun@virtualopensystems.com>2013-12-17 19:42:30 +0000
committerPeter Maydell <peter.maydell@linaro.org>2013-12-17 19:42:30 +0000
commit26861c7ce06c055786323ff4c65af74d735d1c19 (patch)
treea8b61427d2fc8d1cc1b1c9258a4275595fb056d9 /target-arm/kvm.c
parentd356312fdc8640af929e0dbab61c6e514d47feb8 (diff)
downloadqemu-26861c7ce06c055786323ff4c65af74d735d1c19.zip
qemu-26861c7ce06c055786323ff4c65af74d735d1c19.tar.gz
qemu-26861c7ce06c055786323ff4c65af74d735d1c19.tar.bz2
target-arm: Add minimal KVM AArch64 support
Add the bare minimum set of functions needed for control of an AArch64 KVM vcpu: * CPU initialization * minimal get/put register functions which only handle the basic state of the CPU Signed-off-by: Mian M. Hamayun <m.hamayun@virtualopensystems.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1385645602-18662-4-git-send-email-peter.maydell@linaro.org [PMM: significantly overhauled; most notably: * code lives in kvm64.c rather than using #ifdefs * support '-cpu host' rather than implicitly using whatever the host's CPU is regardless of what the user requests * fix bug attempting to get/set nonexistent X[31] * fix bug writing 64 bit kernel pstate into uint32_t env field ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'target-arm/kvm.c')
-rw-r--r--target-arm/kvm.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/target-arm/kvm.c b/target-arm/kvm.c
index 5cdb3b9..1d2688d 100644
--- a/target-arm/kvm.c
+++ b/target-arm/kvm.c
@@ -128,7 +128,11 @@ static void kvm_arm_host_cpu_initfn(Object *obj)
static const TypeInfo host_arm_cpu_type_info = {
.name = TYPE_ARM_HOST_CPU,
+#ifdef TARGET_AARCH64
+ .parent = TYPE_AARCH64_CPU,
+#else
.parent = TYPE_ARM_CPU,
+#endif
.instance_init = kvm_arm_host_cpu_initfn,
.class_init = kvm_arm_host_cpu_class_init,
.class_size = sizeof(ARMHostCPUClass),