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authorPeter Maydell <peter.maydell@linaro.org>2011-01-14 20:39:18 +0100
committerAurelien Jarno <aurelien@aurel32.net>2011-01-14 20:39:18 +0100
commit3a492f3a606642879637d50777444d82440c9f5c (patch)
tree36c28acfabbaca93bfbaf4e3cc8f8e6950daf1ae /target-arm/helper.c
parent9ea62f571ce8953dba1d2bad2bdeaf9c3a84b7d7 (diff)
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target-arm: Add support for 'Standard FPSCR Value' as used by Neon
Add support to the ARM helper routines for a second fp_status value which should be used for operations which the ARM ARM indicates use "ARM standard floating-point arithmetic" rather than being controlled by the rounding/flush/NaN settings in the FPSCR. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index ac47de0..d779055 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -237,6 +237,9 @@ void cpu_reset(CPUARMState *env)
env->vfp.xregs[ARM_VFP_FPEXC] = 0;
env->cp15.c2_base_mask = 0xffffc000u;
#endif
+ set_flush_to_zero(1, &env->vfp.standard_fp_status);
+ set_flush_inputs_to_zero(1, &env->vfp.standard_fp_status);
+ set_default_nan_mode(1, &env->vfp.standard_fp_status);
tlb_flush(env, 1);
}
@@ -2256,6 +2259,7 @@ uint32_t HELPER(vfp_get_fpscr)(CPUState *env)
| (env->vfp.vec_len << 16)
| (env->vfp.vec_stride << 20);
i = get_float_exception_flags(&env->vfp.fp_status);
+ i |= get_float_exception_flags(&env->vfp.standard_fp_status);
fpscr |= vfp_exceptbits_from_host(i);
return fpscr;
}
@@ -2323,6 +2327,7 @@ void HELPER(vfp_set_fpscr)(CPUState *env, uint32_t val)
i = vfp_exceptbits_to_host(val);
set_float_exception_flags(i, &env->vfp.fp_status);
+ set_float_exception_flags(0, &env->vfp.standard_fp_status);
}
void vfp_set_fpscr(CPUState *env, uint32_t val)