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author | Peter Maydell <peter.maydell@linaro.org> | 2012-06-20 11:57:11 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2012-06-20 12:04:54 +0000 |
commit | 4d31c5967979d11c22c69a52beb1a03cab377e4f (patch) | |
tree | 43aec08cc32e5184c501b5649872debd2f508a47 /target-arm/helper.c | |
parent | 7d57f40877675db150d8afbf781de385c3828012 (diff) | |
download | qemu-4d31c5967979d11c22c69a52beb1a03cab377e4f.zip qemu-4d31c5967979d11c22c69a52beb1a03cab377e4f.tar.gz qemu-4d31c5967979d11c22c69a52beb1a03cab377e4f.tar.bz2 |
target-arm: Convert TLS registers
Convert TLS registers to the new cp15 framework
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r-- | target-arm/helper.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index c7addea..d4c8a1c 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -154,6 +154,22 @@ static const ARMCPRegInfo t2ee_cp_reginfo[] = { REGINFO_SENTINEL }; +static const ARMCPRegInfo v6k_cp_reginfo[] = { + { .name = "TPIDRURW", .cp = 15, .crn = 13, .crm = 0, .opc1 = 0, .opc2 = 2, + .access = PL0_RW, + .fieldoffset = offsetof(CPUARMState, cp15.c13_tls1), + .resetvalue = 0 }, + { .name = "TPIDRURO", .cp = 15, .crn = 13, .crm = 0, .opc1 = 0, .opc2 = 3, + .access = PL0_R|PL1_W, + .fieldoffset = offsetof(CPUARMState, cp15.c13_tls2), + .resetvalue = 0 }, + { .name = "TPIDRPRW", .cp = 15, .crn = 13, .crm = 0, .opc1 = 0, .opc2 = 4, + .access = PL1_RW, + .fieldoffset = offsetof(CPUARMState, cp15.c13_tls3), + .resetvalue = 0 }, + REGINFO_SENTINEL +}; + void register_cp_regs_for_features(ARMCPU *cpu) { /* Register all the coprocessor registers based on feature bits */ @@ -169,6 +185,9 @@ void register_cp_regs_for_features(ARMCPU *cpu) } else { define_arm_cp_regs(cpu, not_v6_cp_reginfo); } + if (arm_feature(env, ARM_FEATURE_V6K)) { + define_arm_cp_regs(cpu, v6k_cp_reginfo); + } if (arm_feature(env, ARM_FEATURE_V7)) { define_arm_cp_regs(cpu, v7_cp_reginfo); } else { |