diff options
| author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2015-09-08 17:38:44 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-09-08 17:38:44 +0100 |
| commit | 7a379c7e68f1b2286602b0beeeb58dcef7c9e760 (patch) | |
| tree | 426bbb8c18d468f618648f7f9340bc8a4e01a7ab /target-arm/helper.c | |
| parent | dbc29a868cf5b7e6fa7bb2e6c4f188b9470779c5 (diff) | |
| download | qemu-7a379c7e68f1b2286602b0beeeb58dcef7c9e760.zip qemu-7a379c7e68f1b2286602b0beeeb58dcef7c9e760.tar.gz qemu-7a379c7e68f1b2286602b0beeeb58dcef7c9e760.tar.bz2 | |
target-arm: Correct opc1 for AT_S12Exx
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: 1441311266-8644-3-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper.c')
| -rw-r--r-- | target-arm/helper.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 040bc70..38a05e1 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2975,16 +2975,16 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 3, .access = PL1_W, .type = ARM_CP_NO_RAW, .writefn = ats_write64 }, { .name = "AT_S12E1R", .state = ARM_CP_STATE_AA64, - .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 4, + .opc0 = 1, .opc1 = 4, .crn = 7, .crm = 8, .opc2 = 4, .access = PL2_W, .type = ARM_CP_NO_RAW, .writefn = ats_write64 }, { .name = "AT_S12E1W", .state = ARM_CP_STATE_AA64, - .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 5, + .opc0 = 1, .opc1 = 4, .crn = 7, .crm = 8, .opc2 = 5, .access = PL2_W, .type = ARM_CP_NO_RAW, .writefn = ats_write64 }, { .name = "AT_S12E0R", .state = ARM_CP_STATE_AA64, - .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 6, + .opc0 = 1, .opc1 = 4, .crn = 7, .crm = 8, .opc2 = 6, .access = PL2_W, .type = ARM_CP_NO_RAW, .writefn = ats_write64 }, { .name = "AT_S12E0W", .state = ARM_CP_STATE_AA64, - .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 7, + .opc0 = 1, .opc1 = 4, .crn = 7, .crm = 8, .opc2 = 7, .access = PL2_W, .type = ARM_CP_NO_RAW, .writefn = ats_write64 }, /* AT S1E2* are elsewhere as they UNDEF from EL3 if EL2 is not present */ { .name = "AT_S1E3R", .state = ARM_CP_STATE_AA64, |