diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2012-06-20 11:57:22 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2012-06-20 12:13:04 +0000 |
commit | 4a9a539ffb5226009a1bb4aa3a569fcd80cf1436 (patch) | |
tree | a26d6ca3d48094ddb468a5b2d000c9e734ef16dd /target-arm/helper.c | |
parent | 30b05bba1122c13206d85d3704e86ff30cc09750 (diff) | |
download | qemu-4a9a539ffb5226009a1bb4aa3a569fcd80cf1436.zip qemu-4a9a539ffb5226009a1bb4aa3a569fcd80cf1436.tar.gz qemu-4a9a539ffb5226009a1bb4aa3a569fcd80cf1436.tar.bz2 |
target-arm: Remove remaining old cp15 infrastructure
There are now no uses of the old cp15 infrastructure,
so it can be deleted.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r-- | target-arm/helper.c | 39 |
1 files changed, 0 insertions, 39 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 10d4635..2309923 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1441,16 +1441,6 @@ int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address, int rw, return 1; } -void HELPER(set_cp15)(CPUARMState *env, uint32_t insn, uint32_t val) -{ - cpu_abort(env, "cp15 insn %08x\n", insn); -} - -uint32_t HELPER(get_cp15)(CPUARMState *env, uint32_t insn) -{ - cpu_abort(env, "cp15 insn %08x\n", insn); -} - /* These should probably raise undefined insn exceptions. */ void HELPER(v7m_msr)(CPUARMState *env, uint32_t reg, uint32_t val) { @@ -2177,35 +2167,6 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUARMState *env, target_ulong addr) return phys_addr; } -void HELPER(set_cp15)(CPUARMState *env, uint32_t insn, uint32_t val) -{ - int op1; - int op2; - int crm; - - op1 = (insn >> 21) & 7; - op2 = (insn >> 5) & 7; - crm = insn & 0xf; - /* ??? For debugging only. Should raise illegal instruction exception. */ - cpu_abort(env, "Unimplemented cp15 register write (c%d, c%d, {%d, %d})\n", - (insn >> 16) & 0xf, crm, op1, op2); -} - -uint32_t HELPER(get_cp15)(CPUARMState *env, uint32_t insn) -{ - int op1; - int op2; - int crm; - - op1 = (insn >> 21) & 7; - op2 = (insn >> 5) & 7; - crm = insn & 0xf; - /* ??? For debugging only. Should raise illegal instruction exception. */ - cpu_abort(env, "Unimplemented cp15 register read (c%d, c%d, {%d, %d})\n", - (insn >> 16) & 0xf, crm, op1, op2); - return 0; -} - void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) { if ((env->uncached_cpsr & CPSR_M) == mode) { |