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| author | Xiangyu Hu <libhu.so@gmail.com> | 2015-02-05 13:37:22 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-02-05 13:37:22 +0000 |
| commit | dabf005808f0830313f313c76a492294ef3bce6a (patch) | |
| tree | 639ae9ac42542b3983ca1b5e4a78f1598f82eba1 /target-arm/helper-a64.c | |
| parent | 375421ccaeebae8212eb8f9a36835ad4d9dc60a8 (diff) | |
| download | qemu-dabf005808f0830313f313c76a492294ef3bce6a.zip qemu-dabf005808f0830313f313c76a492294ef3bce6a.tar.gz qemu-dabf005808f0830313f313c76a492294ef3bce6a.tar.bz2 | |
Fix FMULX not squashing denormalized inputs when FZ is set.
While FMULX returns a 2.0f float when two operators are infinity and
zero, those operators should be unpacked from raw inputs first. Inconsistent
cases would occur when operators are denormalized floats in flush-to-zero
mode. A wrong codepath will be entered and 2.0f will not be returned
without this patch.
Fix by checking whether inputs need to be flushed before running into
different codepaths.
Signed-off-by: Xiangyu Hu <libhu.so@gmail.com>
Message-id: 1422459650-12490-1-git-send-email-libhu.so@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper-a64.c')
| -rw-r--r-- | target-arm/helper-a64.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index 81066ca..ebd9247 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -135,6 +135,9 @@ float32 HELPER(vfp_mulxs)(float32 a, float32 b, void *fpstp) { float_status *fpst = fpstp; + a = float32_squash_input_denormal(a, fpst); + b = float32_squash_input_denormal(b, fpst); + if ((float32_is_zero(a) && float32_is_infinity(b)) || (float32_is_infinity(a) && float32_is_zero(b))) { /* 2.0 with the sign bit set to sign(A) XOR sign(B) */ @@ -148,6 +151,9 @@ float64 HELPER(vfp_mulxd)(float64 a, float64 b, void *fpstp) { float_status *fpst = fpstp; + a = float64_squash_input_denormal(a, fpst); + b = float64_squash_input_denormal(b, fpst); + if ((float64_is_zero(a) && float64_is_infinity(b)) || (float64_is_infinity(a) && float64_is_zero(b))) { /* 2.0 with the sign bit set to sign(A) XOR sign(B) */ |