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author | Peter Maydell <peter.maydell@linaro.org> | 2016-02-18 14:16:15 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-02-18 14:16:15 +0000 |
commit | 755026728abb19fba70e6b4396a27fa2e7550d74 (patch) | |
tree | d6339e9eb6347eee2be7c8758abac29d03b0b843 /target-arm/cpu.h | |
parent | 339b665c883b209982fa161dc090ffaf242ab12b (diff) | |
download | qemu-755026728abb19fba70e6b4396a27fa2e7550d74.zip qemu-755026728abb19fba70e6b4396a27fa2e7550d74.tar.gz qemu-755026728abb19fba70e6b4396a27fa2e7550d74.tar.bz2 |
target-arm: correct CNTFRQ access rights
Correct some corner cases we were getting wrong for
CNTFRQ access rights:
* should UNDEF from 32-bit Secure EL1
* only writable from the highest implemented exception level,
which might not be EL1 now
To clarify the code, provide a new utility function
arm_highest_el() which returns the highest implemented
exception level.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r-- | target-arm/cpu.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 5137632..afbf366 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1255,6 +1255,18 @@ static inline bool cptype_valid(int cptype) #define PL1_RW (PL1_R | PL1_W) #define PL0_RW (PL0_R | PL0_W) +/* Return the highest implemented Exception Level */ +static inline int arm_highest_el(CPUARMState *env) +{ + if (arm_feature(env, ARM_FEATURE_EL3)) { + return 3; + } + if (arm_feature(env, ARM_FEATURE_EL2)) { + return 2; + } + return 1; +} + /* Return the current Exception Level (as per ARMv8; note that this differs * from the ARMv7 Privilege Level). */ |