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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-03-13 18:50:23 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-03-13 18:50:23 +0000 |
commit | 53cd6637924a83481038b2266c59dc1e1ff7bb11 (patch) | |
tree | 93b78827af1a3c40325c7bbd406b74c49975e903 /target-arm/cpu.h | |
parent | 7a0e1f41ceeb658791a1456ffc7f8f9edca7da19 (diff) | |
download | qemu-53cd6637924a83481038b2266c59dc1e1ff7bb11.zip qemu-53cd6637924a83481038b2266c59dc1e1ff7bb11.tar.gz qemu-53cd6637924a83481038b2266c59dc1e1ff7bb11.tar.bz2 |
soft float support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1337 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r-- | target-arm/cpu.h | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index a5f4f94..cf11c2f 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -24,6 +24,8 @@ #include "cpu-defs.h" +#include "softfloat.h" + #define EXCP_UDEF 1 /* undefined instruction */ #define EXCP_SWI 2 /* software interrupt */ #define EXCP_PREFETCH_ABORT 3 @@ -70,8 +72,8 @@ typedef struct CPUARMState { /* VFP coprocessor state. */ struct { union { - float s[32]; - double d[16]; + float32 s[32]; + float64 d[16]; } regs; /* We store these fpcsr fields separately for convenience. */ @@ -81,9 +83,10 @@ typedef struct CPUARMState { uint32_t fpscr; /* Temporary variables if we don't have spare fp regs. */ - float tmp0s, tmp1s; - double tmp0d, tmp1d; - + float32 tmp0s, tmp1s; + float64 tmp0d, tmp1d; + + float_status fp_status; } vfp; /* user data */ |