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authorSergey Fedorov <serge.fdrv@gmail.com>2015-09-14 13:53:48 +0300
committerPeter Maydell <peter.maydell@linaro.org>2015-10-16 13:34:02 +0100
commit81669b8b81eb450d7b89ee5fdd57bdb73d87022d (patch)
treed0aa921bf93d96355116024b43696c9d13d75d7e /target-arm/cpu.h
parent74de8c356844080fcabc3a44b08b9d22feda691f (diff)
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target-arm: implement arm_debug_target_el()
Implement debug exception routing according to ARM ARM D2.3.1 Pseudocode description of routing debug exceptions. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r--target-arm/cpu.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index e555122d..3daa7f5 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1702,7 +1702,22 @@ static inline int cpu_mmu_index(CPUARMState *env, bool ifetch)
*/
static inline int arm_debug_target_el(CPUARMState *env)
{
- return 1;
+ bool secure = arm_is_secure(env);
+ bool route_to_el2 = false;
+
+ if (arm_feature(env, ARM_FEATURE_EL2) && !secure) {
+ route_to_el2 = env->cp15.hcr_el2 & HCR_TGE ||
+ env->cp15.mdcr_el2 & (1 << 8);
+ }
+
+ if (route_to_el2) {
+ return 2;
+ } else if (arm_feature(env, ARM_FEATURE_EL3) &&
+ !arm_el_is_aa64(env, 3) && secure) {
+ return 3;
+ } else {
+ return 1;
+ }
}
static inline bool aa64_generate_debug_exceptions(CPUARMState *env)