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authorAndreas Färber <afaerber@suse.de>2012-03-29 04:50:31 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-03-29 15:42:50 +0000
commitdec9c2d4306d7b4f8ffff482ac42dc468ed2a61d (patch)
treead245bee4eea2b7bbcf2e0b7010482a197129e9f /target-arm/cpu.c
parent0bcd08b3522e4feffe3111e7c8145f62d32cc1fb (diff)
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target-arm: Minimalistic CPU QOM'ification
Introduce only one non-abstract type TYPE_ARM_CPU and do not touch cp15 registers to not interfere with Peter's ongoing remodelling. Embed CPUARMState as first (additional) field of ARMCPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.c')
-rw-r--r--target-arm/cpu.c60
1 files changed, 60 insertions, 0 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
new file mode 100644
index 0000000..c3ed45b
--- /dev/null
+++ b/target-arm/cpu.c
@@ -0,0 +1,60 @@
+/*
+ * QEMU ARM CPU
+ *
+ * Copyright (c) 2012 SUSE LINUX Products GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see
+ * <http://www.gnu.org/licenses/gpl-2.0.html>
+ */
+
+#include "cpu-qom.h"
+#include "qemu-common.h"
+
+/* CPUClass::reset() */
+static void arm_cpu_reset(CPUState *s)
+{
+ ARMCPU *cpu = ARM_CPU(s);
+ ARMCPUClass *acc = ARM_CPU_GET_CLASS(cpu);
+
+ acc->parent_reset(s);
+
+ /* TODO Inline the current contents of cpu_state_reset(),
+ once cpu_reset_model_id() is eliminated. */
+ cpu_state_reset(&cpu->env);
+}
+
+static void arm_cpu_class_init(ObjectClass *oc, void *data)
+{
+ ARMCPUClass *acc = ARM_CPU_CLASS(oc);
+ CPUClass *cc = CPU_CLASS(acc);
+
+ acc->parent_reset = cc->reset;
+ cc->reset = arm_cpu_reset;
+}
+
+static const TypeInfo arm_cpu_type_info = {
+ .name = TYPE_ARM_CPU,
+ .parent = TYPE_CPU,
+ .instance_size = sizeof(ARMCPU),
+ .abstract = false,
+ .class_size = sizeof(ARMCPUClass),
+ .class_init = arm_cpu_class_init,
+};
+
+static void arm_cpu_register_types(void)
+{
+ type_register_static(&arm_cpu_type_info);
+}
+
+type_init(arm_cpu_register_types)