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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-04-20 17:58:32 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-04-21 18:09:00 +0000 |
| commit | bd35c3553bfe6acb47034b1bfb2cf093684f406d (patch) | |
| tree | 8e0b6c81f21d8e33c1e21f62f08b404fd7001bc3 /target-arm/cpu.c | |
| parent | 325b3ceff69c987e90acf9c8ef6f55e646b39767 (diff) | |
| download | qemu-bd35c3553bfe6acb47034b1bfb2cf093684f406d.zip qemu-bd35c3553bfe6acb47034b1bfb2cf093684f406d.tar.gz qemu-bd35c3553bfe6acb47034b1bfb2cf093684f406d.tar.bz2 | |
target-arm: Move MVFR* setup to per cpu init fns
Move the MVFR* VFP feature register values to ARMCPU,
so they are set up by the implementation-specific instance
init functions rather than in cpu_reset_model_id().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-arm/cpu.c')
| -rw-r--r-- | target-arm/cpu.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 5fb7803..80ca7aa 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -128,6 +128,8 @@ static void arm1136_r2_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_VFP); cpu->midr = ARM_CPUID_ARM1136_R2; cpu->reset_fpsid = 0x410120b4; + cpu->mvfr0 = 0x11111111; + cpu->mvfr1 = 0x00000000; } static void arm1136_initfn(Object *obj) @@ -138,6 +140,8 @@ static void arm1136_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_VFP); cpu->midr = ARM_CPUID_ARM1136; cpu->reset_fpsid = 0x410120b4; + cpu->mvfr0 = 0x11111111; + cpu->mvfr1 = 0x00000000; } static void arm1176_initfn(Object *obj) @@ -148,6 +152,8 @@ static void arm1176_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_VAPA); cpu->midr = ARM_CPUID_ARM1176; cpu->reset_fpsid = 0x410120b5; + cpu->mvfr0 = 0x11111111; + cpu->mvfr1 = 0x00000000; } static void arm11mpcore_initfn(Object *obj) @@ -158,6 +164,8 @@ static void arm11mpcore_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_VAPA); cpu->midr = ARM_CPUID_ARM11MPCORE; cpu->reset_fpsid = 0x410120b4; + cpu->mvfr0 = 0x11111111; + cpu->mvfr1 = 0x00000000; } static void cortex_m3_initfn(Object *obj) @@ -177,6 +185,8 @@ static void cortex_a8_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); cpu->midr = ARM_CPUID_CORTEXA8; cpu->reset_fpsid = 0x410330c0; + cpu->mvfr0 = 0x11110222; + cpu->mvfr1 = 0x00011100; } static void cortex_a9_initfn(Object *obj) @@ -194,6 +204,8 @@ static void cortex_a9_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V7MP); cpu->midr = ARM_CPUID_CORTEXA9; cpu->reset_fpsid = 0x41033090; + cpu->mvfr0 = 0x11110222; + cpu->mvfr1 = 0x01111111; } static void cortex_a15_initfn(Object *obj) @@ -209,6 +221,8 @@ static void cortex_a15_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); cpu->midr = ARM_CPUID_CORTEXA15; cpu->reset_fpsid = 0x410430f0; + cpu->mvfr0 = 0x10110222; + cpu->mvfr1 = 0x11111111; } static void ti925t_initfn(Object *obj) |