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authorAurelio C. Remonda <aurelioremonda@gmail.com>2015-06-15 18:06:09 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-06-15 18:06:09 +0100
commit62b44f059a84d1ac580a653fc4110dfabaef6b83 (patch)
tree1e626439b0f46595fedee0643a4b6351374845cf /target-arm/cpu.c
parent13e1e476b4bc111d36fffaea025f90d8db52b697 (diff)
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target-arm: Add the THUMB_DSP feature
Create an ARM_FEATURE_THUMB_DSP controlling the Thumb encodings of the 85 DSP instructions (these are all Thumb2). This is enabled for all non-M-profile CPUs with Thumb2 support, as the instructions are mandatory for R and A profiles. On M profile they are optional and not present in the Cortex-M3 (though they are in the M4). The effect of this commit is that we will now treat the DSP encodings as illegal instructions on M3, when previously we incorrectly implemented them. Signed-off-by: Aurelio C. Remonda <aurelioremonda@gmail.com> Message-id: 1434311355-26554-1-git-send-email-aurelioremonda@gmail.com [PMM: added clz/crc32/crc32c and default case to the early-decode switch; minor format/spacing fixups; reworded commit message a bit] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.c')
-rw-r--r--target-arm/cpu.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 34990ac..6fa51f4 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -545,6 +545,10 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
if (arm_feature(env, ARM_FEATURE_CBAR_RO)) {
set_feature(env, ARM_FEATURE_CBAR);
}
+ if (arm_feature(env, ARM_FEATURE_THUMB2) &&
+ !arm_feature(env, ARM_FEATURE_M)) {
+ set_feature(env, ARM_FEATURE_THUMB_DSP);
+ }
if (cpu->reset_hivecs) {
cpu->reset_sctlr |= (1 << 13);