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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-09-18 09:17:13 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-09-18 09:17:13 +0000
commitadf3c8b6e9287810d20edea22e2aaa8bea0b79a9 (patch)
tree86b1c59fd8e7493561732e3c25ddd9d0983d4b38 /target-alpha
parent6ad025921c4d6e63e7065ba084ffe6ddf709c4de (diff)
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alpha: fix a missing literal sign issue
Reported by Tristan Gingold git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5248 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-alpha')
-rw-r--r--target-alpha/translate.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 1b93767..747c7c9 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -390,7 +390,7 @@ static always_inline void gen_arith3 (DisasContext *ctx,
static always_inline void gen_cmov (DisasContext *ctx,
TCGCond inv_cond,
int ra, int rb, int rc,
- int islit, int8_t lit, int mask)
+ int islit, uint8_t lit, int mask)
{
int l1;
@@ -477,7 +477,7 @@ static always_inline void gen_itf (DisasContext *ctx,
/* EXTWH, EXTWH, EXTLH, EXTQH */
static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
int ra, int rb, int rc,
- int islit, int8_t lit)
+ int islit, uint8_t lit)
{
if (unlikely(rc == 31))
return;
@@ -508,7 +508,7 @@ static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
/* EXTBL, EXTWL, EXTWL, EXTLL, EXTQL */
static always_inline void gen_ext_l(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
int ra, int rb, int rc,
- int islit, int8_t lit)
+ int islit, uint8_t lit)
{
if (unlikely(rc == 31))
return;
@@ -567,7 +567,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn)
int32_t disp21, disp16, disp12;
uint16_t fn11, fn16;
uint8_t opc, ra, rb, rc, sbz, fpfn, fn7, fn2, islit;
- int8_t lit;
+ uint8_t lit;
int ret;
/* Decode all instruction fields */