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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-18 00:02:17 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-09-18 00:02:17 +0000 |
commit | 6ad025921c4d6e63e7065ba084ffe6ddf709c4de (patch) | |
tree | 07653d52b627662aac5f68a045b4d9004cef8871 /target-alpha | |
parent | b3249f630e95f3235da438ee1a6cd1b867084e9c (diff) | |
download | qemu-6ad025921c4d6e63e7065ba084ffe6ddf709c4de.zip qemu-6ad025921c4d6e63e7065ba084ffe6ddf709c4de.tar.gz qemu-6ad025921c4d6e63e7065ba084ffe6ddf709c4de.tar.bz2 |
target-alpha: switch a few helpers to TCG
Switch a few helpers to TCG and implement RC and RS instructions
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5247 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-alpha')
-rw-r--r-- | target-alpha/cpu.h | 1 | ||||
-rw-r--r-- | target-alpha/helper.h | 5 | ||||
-rw-r--r-- | target-alpha/op.c | 36 | ||||
-rw-r--r-- | target-alpha/op_helper.c | 38 | ||||
-rw-r--r-- | target-alpha/op_helper.h | 6 | ||||
-rw-r--r-- | target-alpha/translate.c | 22 |
6 files changed, 41 insertions, 67 deletions
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index a14c6ca..4e98c3b 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -269,6 +269,7 @@ struct CPUAlphaState { uint64_t ps; uint64_t unique; int saved_mode; /* Used for HW_LD / HW_ST */ + int intr_flag; /* For RC and RS */ #if TARGET_LONG_BITS > HOST_LONG_BITS /* temporary fixed-point registers diff --git a/target-alpha/helper.h b/target-alpha/helper.h index d82bf43..c397999 100644 --- a/target-alpha/helper.h +++ b/target-alpha/helper.h @@ -4,7 +4,12 @@ DEF_HELPER(void, helper_tb_flush, (void)) +DEF_HELPER(void, helper_excp, (int, int)) DEF_HELPER(uint64_t, helper_amask, (uint64_t)) +DEF_HELPER(uint64_t, helper_load_pcc, (void)) +DEF_HELPER(uint64_t, helper_load_implver, (void)) +DEF_HELPER(uint64_t, helper_rc, (void)) +DEF_HELPER(uint64_t, helper_rs, (void)) DEF_HELPER(uint64_t, helper_ctpop, (uint64_t)) DEF_HELPER(uint64_t, helper_ctlz, (uint64_t)) diff --git a/target-alpha/op.c b/target-alpha/op.c index 5d0daa9..51a60c9 100644 --- a/target-alpha/op.c +++ b/target-alpha/op.c @@ -149,24 +149,6 @@ void OPPROTO op_no_op (void) #endif /* Misc */ -void OPPROTO op_excp (void) -{ - helper_excp(PARAM(1), PARAM(2)); - RETURN(); -} - -void OPPROTO op_load_pcc (void) -{ - helper_load_pcc(); - RETURN(); -} - -void OPPROTO op_load_implver (void) -{ - helper_load_implver(); - RETURN(); -} - void OPPROTO op_load_fpcr (void) { helper_load_fpcr(); @@ -179,24 +161,6 @@ void OPPROTO op_store_fpcr (void) RETURN(); } -void OPPROTO op_load_irf (void) -{ - helper_load_irf(); - RETURN(); -} - -void OPPROTO op_set_irf (void) -{ - helper_set_irf(); - RETURN(); -} - -void OPPROTO op_clear_irf (void) -{ - helper_clear_irf(); - RETURN(); -} - /* Arithmetic */ void OPPROTO op_addqv (void) { diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c index 194f410..c6dcead 100644 --- a/target-alpha/op_helper.c +++ b/target-alpha/op_helper.c @@ -58,7 +58,7 @@ void helper_print_mem_EA (target_ulong EA) /*****************************************************************************/ /* Exceptions processing helpers */ -void helper_excp (uint32_t excp, uint32_t error) +void helper_excp (int excp, int error) { env->exception_index = excp; env->error_code = error; @@ -80,15 +80,15 @@ uint64_t helper_amask (uint64_t arg) return arg; } -void helper_load_pcc (void) +uint64_t helper_load_pcc (void) { /* XXX: TODO */ - T0 = 0; + return 0; } -void helper_load_implver (void) +uint64_t helper_load_implver (void) { - T0 = env->implver; + return env->implver; } void helper_load_fpcr (void) @@ -137,20 +137,30 @@ void helper_store_fpcr (void) } } -void helper_load_irf (void) -{ - /* XXX: TODO */ - T0 = 0; -} +spinlock_t intr_cpu_lock = SPIN_LOCK_UNLOCKED; -void helper_set_irf (void) +uint64_t helper_rs(void) { - /* XXX: TODO */ + uint64_t tmp; + + spin_lock(&intr_cpu_lock); + tmp = env->intr_flag; + env->intr_flag = 1; + spin_unlock(&intr_cpu_lock); + + return tmp; } -void helper_clear_irf (void) +uint64_t helper_rc(void) { - /* XXX: TODO */ + uint64_t tmp; + + spin_lock(&intr_cpu_lock); + tmp = env->intr_flag; + env->intr_flag = 0; + spin_unlock(&intr_cpu_lock); + + return tmp; } void helper_addqv (void) diff --git a/target-alpha/op_helper.h b/target-alpha/op_helper.h index 86c9d21..9c1eb47 100644 --- a/target-alpha/op_helper.h +++ b/target-alpha/op_helper.h @@ -19,14 +19,8 @@ */ void helper_call_pal (uint32_t palcode); -void helper_excp (uint32_t excp, uint32_t error); -void helper_load_pcc (void); -void helper_load_implver (void); void helper_load_fpcr (void); void helper_store_fpcr (void); -void helper_load_irf (void); -void helper_set_irf (void); -void helper_clear_irf (void); void helper_addqv (void); void helper_addlv (void); void helper_subqv (void); diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 583fa86..1b93767 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -250,8 +250,14 @@ static always_inline void _gen_op_bcond (DisasContext *ctx) static always_inline void gen_excp (DisasContext *ctx, int exception, int error_code) { + TCGv tmp1, tmp2; + tcg_gen_movi_i64(cpu_pc, ctx->pc); - gen_op_excp(exception, error_code); + tmp1 = tcg_const_i32(exception); + tmp2 = tcg_const_i32(error_code); + tcg_gen_helper_0_2(helper_excp, tmp1, tmp2); + tcg_temp_free(tmp2); + tcg_temp_free(tmp1); } static always_inline void gen_invalid (DisasContext *ctx) @@ -1176,9 +1182,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) break; case 0x6C: /* IMPLVER */ - gen_op_load_implver(); if (rc != 31) - tcg_gen_mov_i64(cpu_ir[rc], cpu_T[0]); + tcg_gen_helper_1_0(helper_load_implver, cpu_ir[rc]); break; default: goto invalid_opc; @@ -1699,16 +1704,13 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) break; case 0xC000: /* RPCC */ - gen_op_load_pcc(); if (ra != 31) - tcg_gen_mov_i64(cpu_ir[ra], cpu_T[0]); + tcg_gen_helper_1_0(helper_load_pcc, cpu_ir[ra]); break; case 0xE000: /* RC */ - gen_op_load_irf(); if (ra != 31) - tcg_gen_mov_i64(cpu_ir[ra], cpu_T[0]); - gen_op_clear_irf(); + tcg_gen_helper_1_0(helper_rc, cpu_ir[ra]); break; case 0xE800: /* ECB */ @@ -1721,10 +1723,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) break; case 0xF000: /* RS */ - gen_op_load_irf(); if (ra != 31) - tcg_gen_mov_i64(cpu_ir[ra], cpu_T[0]); - gen_op_set_irf(); + tcg_gen_helper_1_0(helper_rs, cpu_ir[ra]); break; case 0xF800: /* WH64 */ |