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| author | Richard Henderson <rth@twiddle.net> | 2011-04-18 15:09:09 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@anchor.twiddle.net> | 2011-05-31 10:18:05 -0700 |
| commit | 6a80e088c70b88f844ed90b78f4ce987c43ec522 (patch) | |
| tree | 71da5cd011715a126943b47903a684ef553e2c4e /target-alpha/cpu.h | |
| parent | a18ad89351dd6c828b7fe33fafd1764cef61a40d (diff) | |
| download | qemu-6a80e088c70b88f844ed90b78f4ce987c43ec522.zip qemu-6a80e088c70b88f844ed90b78f4ce987c43ec522.tar.gz qemu-6a80e088c70b88f844ed90b78f4ce987c43ec522.tar.bz2 | |
target-alpha: Disable interrupts properly.
Interrupts are disabled in PALmode, and when the PS IL is high enough.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-alpha/cpu.h')
| -rw-r--r-- | target-alpha/cpu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index f5d90c7..a1f92ab 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -315,6 +315,11 @@ enum { EXCP_STQ_C, }; +/* Alpha-specific interrupt pending bits. */ +#define CPU_INTERRUPT_TIMER CPU_INTERRUPT_TGT_EXT_0 +#define CPU_INTERRUPT_SMP CPU_INTERRUPT_TGT_EXT_1 +#define CPU_INTERRUPT_MCHK CPU_INTERRUPT_TGT_EXT_2 + /* Hardware interrupt (entInt) constants. */ enum { INT_K_IP, |