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author | Edgar E. Iglesias <edgar.iglesias@amd.com> | 2022-04-06 18:43:02 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2022-04-21 11:37:03 +0100 |
commit | 369e5cb0c948b65e0845ca3394e25d757dd93206 (patch) | |
tree | d5f0ebf016671a733ddc87b4717f6a342f7998f4 /subprojects/libvhost-user | |
parent | 67a645a35110f300144ae844cbf839762abcd98d (diff) | |
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hw/misc: Add a model of the Xilinx Versal CRL
Add a model of the Xilinx Versal CRL.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Frederic Konrad <fkonrad@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-id: 20220406174303.2022038-4-edgar.iglesias@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'subprojects/libvhost-user')
0 files changed, 0 insertions, 0 deletions