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author | Nicholas Piggin <npiggin@gmail.com> | 2022-06-20 18:48:37 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2022-06-21 09:28:41 -0700 |
commit | c79a8e840c435bc26a251e34b043318e8b2081db (patch) | |
tree | 47c9954564787ad2abb3c37b01df9be199530351 /softmmu/cpus.c | |
parent | bdd50dc7d09c90525b80da4f056b849049893732 (diff) | |
download | qemu-c79a8e840c435bc26a251e34b043318e8b2081db.zip qemu-c79a8e840c435bc26a251e34b043318e8b2081db.tar.gz qemu-c79a8e840c435bc26a251e34b043318e8b2081db.tar.bz2 |
util/cacheflush: Optimize flushing when ppc host has coherent icache
On linux, the AT_HWCAP bit PPC_FEATURE_ICACHE_SNOOP indicates
that we can use a simplified 3 instruction flush sequence.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <20220519141131.29839-1-npiggin@gmail.com>
[rth: update after merging cacheflush.c and cacheinfo.c]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220621014837.189139-4-richard.henderson@linaro.org>
Diffstat (limited to 'softmmu/cpus.c')
0 files changed, 0 insertions, 0 deletions