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| author | Zhao Liu <zhao1.liu@intel.com> | 2025-07-11 18:21:36 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-07-12 15:28:21 +0200 |
| commit | a9b6cca2df62ab3b0ba03edb3229a0eda385f65b (patch) | |
| tree | 0d0788d26aa5afe9cadb0e20ac7e0d0dcb08fd72 /scripts/tracetool/backend | |
| parent | 63dc9f52f63475f61404a7f5a010aa352ead8763 (diff) | |
| download | qemu-a9b6cca2df62ab3b0ba03edb3229a0eda385f65b.zip qemu-a9b6cca2df62ab3b0ba03edb3229a0eda385f65b.tar.gz qemu-a9b6cca2df62ab3b0ba03edb3229a0eda385f65b.tar.bz2 | |
i386/cpu: Add legacy_intel_cache_info cache model
Based on legacy_l1d_cache, legacy_l1i_cache, legacy_l2_cache and
legacy_l3_cache, build a complete legacy intel cache model, which can
clarify the purpose of these trivial legacy cache models, simplify the
initialization of cache info in X86CPUState, and make it easier to
handle compatibility later.
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Tested-by: Yi Lai <yi1.lai@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250711102143.1622339-12-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'scripts/tracetool/backend')
0 files changed, 0 insertions, 0 deletions