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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-06-02 11:51:48 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-06-02 11:51:48 +0100 |
| commit | 06312febfb2d35367006ef23608ddd6a131214d4 (patch) | |
| tree | 9e849bdaa9b3fe34d433851ce15335d2437c4115 /scripts/qapi2texi.py | |
| parent | f50cd31413d8bc9d1eef8edd1f878324543bf65d (diff) | |
| download | qemu-06312febfb2d35367006ef23608ddd6a131214d4.zip qemu-06312febfb2d35367006ef23608ddd6a131214d4.tar.gz qemu-06312febfb2d35367006ef23608ddd6a131214d4.tar.bz2 | |
arm: Don't let no-MPU PMSA cores write to SCTLR.M
If the CPU is a PMSA config with no MPU implemented, then the
SCTLR.M bit should be RAZ/WI, so that the guest can never
turn on the non-existent MPU.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1493122030-32191-7-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'scripts/qapi2texi.py')
0 files changed, 0 insertions, 0 deletions