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| author | Fabiano Rosas <farosas@linux.ibm.com> | 2022-02-09 09:08:55 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-02-09 09:08:55 +0100 |
| commit | 9dc20cc37db9d13ccce00e7274f22d41f5306443 (patch) | |
| tree | b7f8f236669061d88b0f76e8bfbdb7d14552f3cf /scripts/decodetree.py | |
| parent | 180952cedc0eef37ac43f9de66bdc0ebd43e2ed8 (diff) | |
| download | qemu-9dc20cc37db9d13ccce00e7274f22d41f5306443.zip qemu-9dc20cc37db9d13ccce00e7274f22d41f5306443.tar.gz qemu-9dc20cc37db9d13ccce00e7274f22d41f5306443.tar.bz2 | |
target/ppc: Simplify powerpc_excp_booke
Differences from the generic powerpc_excp code:
- No MSR bits are cleared at interrupt dispatch;
- No MSR_HV;
- No power saving states;
- No Hypervisor Emulation Assistance;
- SPEU needs special handling;
- Big endian only;
- Both 64 and 32 bits;
- No System call vectored;
- No Alternate Interrupt Location.
Exceptions used:
POWERPC_EXCP_ALIGN
POWERPC_EXCP_APU
POWERPC_EXCP_CRITICAL
POWERPC_EXCP_DEBUG
POWERPC_EXCP_DECR
POWERPC_EXCP_DSI
POWERPC_EXCP_DTLB
POWERPC_EXCP_EFPDI
POWERPC_EXCP_EFPRI
POWERPC_EXCP_EXTERNAL
POWERPC_EXCP_FIT
POWERPC_EXCP_FPU
POWERPC_EXCP_ISI
POWERPC_EXCP_ITLB
POWERPC_EXCP_MCHECK
POWERPC_EXCP_PROGRAM
POWERPC_EXCP_RESET
POWERPC_EXCP_SPEU
POWERPC_EXCP_SYSCALL
POWERPC_EXCP_WDT
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Message-Id: <20220128224018.1228062-3-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'scripts/decodetree.py')
0 files changed, 0 insertions, 0 deletions