diff options
author | LIU Zhiwei <zhiwei_liu@c-sky.com> | 2022-01-20 20:20:47 +0800 |
---|---|---|
committer | Alistair Francis <alistair.francis@wdc.com> | 2022-01-21 15:52:57 +1000 |
commit | d8c40c24fd5276536a95052ab35763c21def6f01 (patch) | |
tree | d467899a4db1bd079ca4a3848663e88c44490477 /scripts/check_sparse.py | |
parent | d6b9d9302342fc273441811b43dd42dbd3b799e0 (diff) | |
download | qemu-d8c40c24fd5276536a95052ab35763c21def6f01.zip qemu-d8c40c24fd5276536a95052ab35763c21def6f01.tar.gz qemu-d8c40c24fd5276536a95052ab35763c21def6f01.tar.bz2 |
target/riscv: Adjust scalar reg in vector with XLEN
When sew <= 32bits, not need to extend scalar reg.
When sew > 32bits, if xlen is less that sew, we should sign extend
the scalar register, except explicitly specified by the spec.
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220120122050.41546-21-zhiwei_liu@c-sky.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/check_sparse.py')
0 files changed, 0 insertions, 0 deletions