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author | Julian Brown <julian@codesourcery.com> | 2017-02-07 18:29:59 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-02-07 18:29:59 +0000 |
commit | 40612000599e52e792d23c998377a0fa429c4036 (patch) | |
tree | 8549aae95f252fb42907a2e7678fed6fc6b4605e /qom | |
parent | f7478a92dd9ee2276bfaa5b7317140d3f9d6a53b (diff) | |
download | qemu-40612000599e52e792d23c998377a0fa429c4036.zip qemu-40612000599e52e792d23c998377a0fa429c4036.tar.gz qemu-40612000599e52e792d23c998377a0fa429c4036.tar.bz2 |
arm: Correctly handle watchpoints for BE32 CPUs
In BE32 mode, sub-word size watchpoints can fail to trigger because the
address of the access is adjusted in the opcode helpers before being
compared with the watchpoint registers. This patch reverses the address
adjustment before performing the comparison with the help of a new CPUClass
hook.
This version of the patch augments and tidies up comments a little.
Signed-off-by: Julian Brown <julian@codesourcery.com>
Message-id: caaf64ffc72f6ae183015337b7afdbd4b8989cb6.1484929304.git.julian@codesourcery.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'qom')
-rw-r--r-- | qom/cpu.c | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -391,6 +391,11 @@ static int64_t cpu_common_get_arch_id(CPUState *cpu) return cpu->cpu_index; } +static vaddr cpu_adjust_watchpoint_address(CPUState *cpu, vaddr addr, int len) +{ + return addr; +} + static void cpu_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -415,6 +420,7 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->cpu_exec_enter = cpu_common_noop; k->cpu_exec_exit = cpu_common_noop; k->cpu_exec_interrupt = cpu_common_exec_interrupt; + k->adjust_watchpoint_address = cpu_adjust_watchpoint_address; set_bit(DEVICE_CATEGORY_CPU, dc->categories); dc->realize = cpu_common_realizefn; dc->unrealize = cpu_common_unrealizefn; |