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authorMax Filippov <jcmvbkbc@gmail.com>2011-09-06 03:55:33 +0400
committerBlue Swirl <blauwirbel@gmail.com>2011-09-10 16:57:37 +0000
commit2af3da91839c04a5d73643b4eacce4cd93b9d428 (patch)
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target-xtensa: add special and user registers
Special Registers hold the majority of the state added to the processor by the options. See ISA, 5.3 for details. User Registers hold state added in support of designer's TIE and in some cases of options that Tensilica provides. See ISA, 5.4 for details. Only registers mapped in sregnames or uregnames are considered valid. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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