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author | Peter Maydell <peter.maydell@linaro.org> | 2014-02-08 14:46:55 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-02-08 14:46:55 +0000 |
commit | 8b12a0cfc1449b1a0768705e61df5235bf93160d (patch) | |
tree | cb30279079174c9365d0b267f15ac353a338ff55 /qemu-file.c | |
parent | 6d9571f7d842a2112937fb161a5c077ca4cac757 (diff) | |
download | qemu-8b12a0cfc1449b1a0768705e61df5235bf93160d.zip qemu-8b12a0cfc1449b1a0768705e61df5235bf93160d.tar.gz qemu-8b12a0cfc1449b1a0768705e61df5235bf93160d.tar.bz2 |
target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns
Implement the SIMD 3-reg-same instructions where the size == 3 case
is reserved: SHADD, UHADD, SRHADD, URHADD, SHSUB, UHSUB, SMAX,
UMAX, SMIN, UMIN, SABD, UABD, SABA, UABA, MLA, MLS, MUL, PMUL,
SQRDMULH, SQDMULH. (None of these have scalar-3-same versions.)
This completes the non-pairwise integer instructions in this category.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'qemu-file.c')
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