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| author | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-09 23:53:45 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-10 00:02:16 +0100 |
| commit | 829a49274f6741c0f3d3a2ba4698baf381a7e264 (patch) | |
| tree | fb172a06fdb03cab4b9d7a538c4f7a6e100aa183 /qemu-error.h | |
| parent | c0f809c46aa271f29a9e6268cdeda1f21301a8ef (diff) | |
| download | qemu-829a49274f6741c0f3d3a2ba4698baf381a7e264.zip qemu-829a49274f6741c0f3d3a2ba4698baf381a7e264.tar.gz qemu-829a49274f6741c0f3d3a2ba4698baf381a7e264.tar.bz2 | |
target-sh4: improve TLB
SH4 is using 16-bit instructions which means most of the constants are
loaded through a constant pool at the end of the subroutine. The same
memory page is therefore accessed in exec and read mode.
With the current implementation, a QEMU TLB entry is set to read or
read/write mode after an UTLB search and to exec mode after an ITLB
search, which causes a lot of TLB exceptions to switch from read or
read/write to exec and vice versa.
This patch optimizes that by already setting the QEMU TLB entry in read
or read/write mode when an UTLB entry is copied into ITLB (during an
ITLB miss). This improve the emulation speed by about 14%.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'qemu-error.h')
0 files changed, 0 insertions, 0 deletions