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authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2019-03-07 18:05:19 +0000
committerDavid Gibson <david@gibson.dropbear.id.au>2019-03-12 14:33:04 +1100
commit8a14d31b00ae82ed430806bac96962b73fe6967f (patch)
tree9c5940c80cf3978c29c17cc8c6557b7cebe2d695 /qapi/string-input-visitor.c
parent37da91f163d2ec808cca4f1662499dbe07f858e1 (diff)
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target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order
When VSX support was initially added, the fpr registers were added at offset 0 of the VSR register and the vsrl registers were added at offset 1. This is in contrast to the VMX registers (the last 32 VSX registers) which are stored in host-endian order. Switch the fpr/vsrl registers so that the lower 32 VSX registers are now also stored in host endian order to match the VMX registers. This ensures that TCG vector operations involving mixed VMX and VSX registers will function correctly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20190307180520.13868-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'qapi/string-input-visitor.c')
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