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| author | Yang Zhong <yang.zhong@intel.com> | 2021-11-01 12:20:07 -0400 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-12-10 09:47:18 +0100 |
| commit | 4755927ae12547c2e7cb22c5fa1b39038c6c11b1 (patch) | |
| tree | f56310d88bf335222209ba36a7a369d2a77e7c47 /qapi/misc-target.json | |
| parent | 1105812382e1126d86dddc16b3700f8c79dc93d1 (diff) | |
| download | qemu-4755927ae12547c2e7cb22c5fa1b39038c6c11b1.zip qemu-4755927ae12547c2e7cb22c5fa1b39038c6c11b1.tar.gz qemu-4755927ae12547c2e7cb22c5fa1b39038c6c11b1.tar.bz2 | |
numa: Support SGX numa in the monitor and Libvirt interfaces
Add the SGXEPCSection list into SGXInfo to show the multiple
SGX EPC sections detailed info, not the total size like before.
This patch can enable numa support for 'info sgx' command and
QMP interfaces. The new interfaces show each EPC section info
in one numa node. Libvirt can use QMP interface to get the
detailed host SGX EPC capabilities to decide how to allocate
host EPC sections to guest.
(qemu) info sgx
SGX support: enabled
SGX1 support: enabled
SGX2 support: enabled
FLC support: enabled
NUMA node #0: size=67108864
NUMA node #1: size=29360128
The QMP interface show:
(QEMU) query-sgx
{"return": {"sgx": true, "sgx2": true, "sgx1": true, "sections": \
[{"node": 0, "size": 67108864}, {"node": 1, "size": 29360128}], "flc": true}}
(QEMU) query-sgx-capabilities
{"return": {"sgx": true, "sgx2": true, "sgx1": true, "sections": \
[{"node": 0, "size": 17070817280}, {"node": 1, "size": 17079205888}], "flc": true}}
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20211101162009.62161-4-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'qapi/misc-target.json')
| -rw-r--r-- | qapi/misc-target.json | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/qapi/misc-target.json b/qapi/misc-target.json index 5aa2b95..1022aa0 100644 --- a/qapi/misc-target.json +++ b/qapi/misc-target.json @@ -338,6 +338,21 @@ ## +# @SGXEPCSection: +# +# Information about intel SGX EPC section info +# +# @node: the numa node +# +# @size: the size of epc section +# +# Since: 6.2 +## +{ 'struct': 'SGXEPCSection', + 'data': { 'node': 'int', + 'size': 'uint64'}} + +## # @SGXInfo: # # Information about intel Safe Guard eXtension (SGX) support @@ -350,7 +365,7 @@ # # @flc: true if FLC is supported # -# @section-size: The EPC section size for guest +# @sections: The EPC sections info for guest # # Since: 6.2 ## @@ -359,7 +374,7 @@ 'sgx1': 'bool', 'sgx2': 'bool', 'flc': 'bool', - 'section-size': 'uint64'}, + 'sections': ['SGXEPCSection']}, 'if': 'TARGET_I386' } ## |