aboutsummaryrefslogtreecommitdiff
path: root/qapi/common.json
diff options
context:
space:
mode:
authorDragan Mladjenovic <dragan.mladjenovic@syrmia.com>2022-05-04 13:03:58 +0200
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2022-06-11 11:35:34 +0200
commit9e4f726d4f489e9f1cd675f4e5ce300f7677ed40 (patch)
tree6de37cb8226f1c3445ab247cc807cedf83806797 /qapi/common.json
parenta1b092537ac52b9a19e14ea163cb653149efcbb8 (diff)
downloadqemu-9e4f726d4f489e9f1cd675f4e5ce300f7677ed40.zip
qemu-9e4f726d4f489e9f1cd675f4e5ce300f7677ed40.tar.gz
qemu-9e4f726d4f489e9f1cd675f4e5ce300f7677ed40.tar.bz2
target/mips: Fix emulation of nanoMIPS EXTRV_S.H instruction
The field rs in the instruction EXTRV_S.H rt, ac, rs is specified in nanoMIPS documentation as opcode[20..16]. It is, however, erroneously considered as opcode[25..21] in the current QEMU implementation. In function gen_pool32axf_2_nanomips_insn(), the variable v0_t corresponds to rt/opcode[25..21], and v1_t corresponds to rs/opcode[20..16]), and v0_t is by mistake passed to the helper gen_helper_extr_s_h(). Use v1_t rather than v0_t in the invocation of gen_helper_extr_s_h() to fix this. Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com> Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com> Fixes: 8b3698b294 ("target/mips: Add emulation of DSP ASE for nanoMIPS") Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220504110403.613168-3-stefan.pejic@syrmia.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'qapi/common.json')
0 files changed, 0 insertions, 0 deletions