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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-01-30 18:01:29 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2019-05-06 11:18:34 -0700 |
| commit | 17560e9349ff1fcce814184b37993f92378cf0c4 (patch) | |
| tree | e2bc0f40fe15dba56da177abb85e45c533945e68 /po | |
| parent | a6ae23831b05a11880b40f7d58e332c45a6b04f7 (diff) | |
| download | qemu-17560e9349ff1fcce814184b37993f92378cf0c4.zip qemu-17560e9349ff1fcce814184b37993f92378cf0c4.tar.gz qemu-17560e9349ff1fcce814184b37993f92378cf0c4.tar.bz2 | |
decodetree: Initial support for variable-length ISAs
Assuming that the ISA clearly describes how to determine
the length of the instruction, and the ISA has a reasonable
maximum instruction length, the input to the decoder can be
right-justified in an appropriate insn word.
This is not 100% convenient, as out-of-line %fields are
numbered relative to the maximum instruction length, but
this appears to still be usable.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'po')
0 files changed, 0 insertions, 0 deletions