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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-08-20 23:02:09 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-08-20 23:02:09 +0000
commit3f3373166227b13e762e20d2fb51eadfa6a2d653 (patch)
tree61211017f0428c56b245c36b357aa0e2de4ec91e /ops_template.h
parentd05e66d217f8f83487c3b1d3015a67316b47645f (diff)
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pop ss, mov ss, x and sti disable irqs for the next instruction - began dispatch optimization by adding new x86 cpu 'hidden' flags
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@372 c046a42c-6fe2-441c-8c8c-71466251a162
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