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authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>2023-04-06 15:03:42 -0300
committerAlistair Francis <alistair.francis@wdc.com>2023-05-05 10:49:50 +1000
commit1a36e23a62283ecca1b56a983cfce67e4ec84ee7 (patch)
tree4fc0996b539c81f9a2ada4d426ded5a92114f4ab /nbd
parent427d8e7dd871a747727dbbfef22041fedef2ee32 (diff)
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target/riscv: remove cpu->cfg.ext_m
Create a new "m" RISCVCPUMisaExtConfig property that will update env->misa_ext* with RVM. Instances of cpu->cfg.ext_m and similar are replaced with riscv_has_ext(env, RVM). Remove the old "m" property and 'ext_m' from RISCVCPUConfig. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230406180351.570807-12-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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