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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-07-02 17:57:46 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-07-02 17:57:46 +0100 |
| commit | ab08440a4ee09032d1a9cb22fdcab23bc7e1c656 (patch) | |
| tree | 1ecb443a3b08cbe09a0f1864cd7feb9f42f23da8 /nbd | |
| parent | e14dcc9cda9858e169b8387ec0a93077d75d4faa (diff) | |
| parent | 9c8c334b0637bf3c592d432b0c11f3b62dd5dba3 (diff) | |
| download | qemu-ab08440a4ee09032d1a9cb22fdcab23bc7e1c656.zip qemu-ab08440a4ee09032d1a9cb22fdcab23bc7e1c656.tar.gz qemu-ab08440a4ee09032d1a9cb22fdcab23bc7e1c656.tar.bz2 | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180702' into staging
Assorted tlb and tb caching fixes
# gpg: Signature made Mon 02 Jul 2018 17:03:07 BST
# gpg: using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20180702:
cpu: Assert asidx_from_attrs return value in range
accel/tcg: Avoid caching overwritten tlb entries
accel/tcg: Don't treat invalid TLB entries as needing recheck
accel/tcg: Correct "is this a TLB miss" check in get_page_addr_code()
tcg: Define and use new tlb_hit() and tlb_hit_page() functions
translate-all: fix locking of TBs whose two pages share the same physical page
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'nbd')
0 files changed, 0 insertions, 0 deletions