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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-10-21 11:28:46 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-10-21 11:28:46 +0000 |
commit | 3d7b417e13152587df587fe58789740c3ef7abb9 (patch) | |
tree | 824bf571e3bad076986e5144f6834ffd032d77f1 /monitor.c | |
parent | d75a0b97e0e9bfcd73dd2ef081ba06e53932b42d (diff) | |
download | qemu-3d7b417e13152587df587fe58789740c3ef7abb9.zip qemu-3d7b417e13152587df587fe58789740c3ef7abb9.tar.gz qemu-3d7b417e13152587df587fe58789740c3ef7abb9.tar.bz2 |
target-ppc: Convert XER accesses to TCG
Define XER bits as a single register and access them individually to
avoid defining 5 32-bit registers (TCG doesn't permit to map 8-bit
registers).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5500 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'monitor.c')
-rw-r--r-- | monitor.c | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -1582,7 +1582,7 @@ static target_long monitor_get_xer (const struct MonitorDef *md, int val) CPUState *env = mon_get_cpu(); if (!env) return 0; - return ppc_load_xer(env); + return env->xer; } static target_long monitor_get_decr (const struct MonitorDef *md, int val) |